Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure.
Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at the forefront of Smart, Secure Everything with the world’s most advanced tools for silicon chip design, verification, IP integration, and application security testing. Our technology helps customers innovate from Silicon to Software, so they can deliver Smart, Secure Everything.
The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, interface IP, security IP, embedded processors, and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys’ IP Accelerated initiative offers IP Prototyping Kits and IP subsystems. Our extensive investment in IP quality, comprehensive technical support and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market.
This internship with be with our Solutions IP group.
What You Will Learn
As an intern, you will be working on the data path synthesis optimization engine of the synthesis products. Tasks include:
- Analyzing and improving run time performance of the low power optimization flow on existing optimization engine
- Learning the connectivity data model and contributing to various aspects of the data path optimization projects (i.e. graph optimizations, gate sizing, etc)
- Analyzing and proposing optimization solutions to improve timing and area quality of results
Through the internship, you will gain valuable experiences with the use of EDA tools (Design Compiler, formal verification tools, etc), algorithms and methodology to develop data path optimizations.
This position is convertible to full-time position after finishing intern period with good performance.
Skill Requirements
- Good understanding of high level synthesis, logic optimization algorithms, computer arithmetic (add/sub/multiplication/division)
- Have experience in using Design Compiler or other synthesis tools. P&R tools experience is desirable.
- Able to debug complex software on Linux
- Must be proficient in C/C++/Python and scripting languages (Unix shell and Tcl)
Education Requirements
- Must be currently enrolled in a Masters or PhD Program pursuing Electrical Engineering or Computer Science with 3 years of related experience. Must be able to commit to a 3 month internship.
